This article will hopefully explain many of the important differences between MLC and SLC NAND and how using each may affect a platform.
SLC (Single-Level Cell)
Single-Level-Cell NAND is a type of NAND where each cell (an electrical unit containing a charge) is able to represent two states (either a one or a zero.) In this type of NAND, if a single-cell became corrupted, only a single-bit would change state.
For example, the 8-bit byte 00100110 would require 8 Cells of an SLC NAND chip to store the byte. If a single cell became invalid then only one of the bits would flip from a 0 to a 1 or a 1 to a 0.
MLC (Multi-Level Cell)
Multi-Level Cell NAND is a type of NAND where each cell (an electrical unit containing a charge) is able to represent more than two states (for example 4 states). In this type of NAND if a single cell became corrupted, more than a single bit would change state.
For example (4 State MLC NAND), the 8-bit byte 00100110 would require 4 cells of MLC NAND to store the byte. If a single Cell became invalid then one(1) - two(2) of the bits could flip.
NAND and ECC
NAND Flash itself, is known to suffer from the possibility of having a cell within a Page become corrupt (change to a state other than the correct state.) Because of this ECC is used to determine if any bits have flipped, and if they have correct them (as long as too many haven't flipped.)
Historically, 1-bit Error Correction, 2-bit Error Detection was always used for the ECC Generation because SLC NAND only suffers from single-bit errors on cells that are within a good block (Bad Blocks can have more than one (1) bad cell per page.)
With the advent of MLC NAND, 1-bit Error Correction, 2-bit Error Detection is no longer sufficient to detect NAND errors as a single corrupt cell may actually cause 2 or more bits to flip depending on how many levels each cell could contain (4-state = 2 bits, 8-state = 3 bits, etc...)
Considerations When Deciding on SLC or MLC NAND
MLC NAND often costs less per MB and is available in larger sizes as SLC as it can be made more densely (due to multiple states per cell.) Because of this cost consideration, the use of MLC NAND has become more and more prevalent as our storage needs also increase.
Because using MLC NAND requires the use of an ECC Algorithm that can do better than Single-Bit Error Correction, Double-Bit Error Detection (SECDED) using MLC NAND may cause situations where Hardware ECC Controllers are not able to be used to offload the processor (many only support SECDED.)
